/ Dalvik / vm / Sync.cpp have this code:
/ *
* Monitors provide:
* - Mutually exclusive access to resources
* - A way for multiple threads to wait for notification
*
* In effect, they fill the role of both mutexes and condition variables.
*
* Only one thread can own the monitor at any time. There may be several
* Threads waiting on it (the wait call unlocks it). One or more waiting
* Threads may be getting interrupted or notified at any given time.
*
* TODO: the various members of monitor are not SMP-safe
.* /
struct Monitor {
Thread * owner;? / * Which thread currently owns the lock * /
int lockCount; / * owner's recursive lock depth * /
Object * obj; / * what object are we part of [debug only] * /
Thread * waitSet; / * threads currently waiting on this monitor * /
pthread_mutex_t lock;
Monitor * next;
/ *
* Who last acquired this monitor, when lock sampling is enabled.
* Even when enabled, ownerMethod may be NULL.
* /
const Method * ownerMethod;
u4 ownerPc;
};
/ *
* Create and initialize a monitor.
* /
Monitor * dvmCreateMonitor (Object * obj)
{
Monitor * mon;
mon = (Monitor *) calloc (1, sizeof (Monitor));
if (mon == NULL) {
ALOGE ("Unable to allocate monitor");
dvmAbort ();
}
if (((u4) mon & 7)! = 0) {/ / From here, Monitor should be
8-byte alignedALOGE ("Misaligned monitor:% p", mon);
dvmAbort ();
}
mon-> obj = obj;
dvmInitMutex (& mon-> lock);
/ * Replace the head of the list with the new monitor * /
do {
mon-> next = gDvm.monitorList;
} While (android_atomic_release_cas ((int32_t) mon-> next, (int32_t) mon,
(Int32_t *) (void *) & gDvm.monitorList) = 0);!
return mon;
}
But how am I, feel Monitor is a 4-byte aligned: the length of all pointers are 4 bytes, int and u4 also 4-byte aligned, pthread_mutex_t was a 4-byte aligned structure:
/ *
* Types
* /
typedef struct
{
int volatile value;
} Pthread_mutex_t;
Which of the following are more familiar with C + + pointers brothers, who perennial with java can not afford injuries.
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Reply:
Structure is 8-byte aligned, I think it is as long as it should support 8-byte floating-point alignment, other small microcontroller is probably because they do not support 4-byte floating-point numbers aligned
Reply:
8-byte aligned structure is characteristic arm platform it? Before seeing basically X86 data, there is no mention of this rule.
Reply:
The compiler should rule # progma can be modified,
Reply:
You want to say # pragma pack ([show] | [push | pop] [, identifier], n) command, right?
I see the data, a lot of the information mentioned can use this command to modify the default compiler memory alignment values.
But according to the following principles:
structure (or union) of the overall alignment rules: In the data members after the completion of their alignment, structure (or union) itself must also be aligned, the alignment will be specified by the # pragma pack value and structure (or union) members of the largest data length, that for relatively small.
If Monitor the length of all data members are 4 bytes, then Monitor should be 4-byte aligned ah?
Reply:
Consider carefully, it should be this:
Alignment and structure of the structure where the memory address is different. Structure alignment as you said above, but the memory manager will be assigned to a structure which address is associated with memory management,
if (((u4) mon & 7)! = 0) only shows the first address of the structure must be aligned on an 8-byte address is aligned according to the above rules you said that the number of bytes actually occupied structure calculation.
Reply:
This sounds quite reasonable. But also some unreasonable:
1 If Monitor is a 4-byte aligned, then the compiler is guaranteed by what means Monitor is the first address on the 8-byte aligned address?
2 If I apply for a Monitor array of length 2, assuming Monitor length is 36 (not an integer multiple of 8) bytes, then the address of the array based on the principle of continuous distribution, the first two Monitor should not be placed on the first address To the 8-byte aligned address it?
Reply:
A memory manager when you apply for memory, the first address will be placed on the structure of the 8-byte address, attention is first address. For example, use of open source dalvik memory manager, are interested can go and see
2 The array is also the first address assigned to 8-byte aligned address, and the array elements need only align the top of varying requirements of its first 8-byte aligned address.
You can write a simple program to test the know
Reply:
Thanks, I try ~
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